Adders and Subtractors
Contents |
Introduction
In the unit about binary mathematics, the concept of adding two binary numbers was developed; and the process of adding binary numbers can be easily implemented in hardware. If two one-bit numbers are added they will produce a sum and an optional carry; and the hardware that performs this is called a half adder. If two one-bit numbers along with a third input (a carry-in from another adder) are added, they will produce a sum and an optional carry; and the hardware that performs this is function called a full adder.
Half Adder
Following is the truth table for a half adder:
Inputs | Outputs | ||
---|---|---|---|
A | B | Sum | Carry Out |
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
The Sum of A and B on this truth table matches the Exclusive Or (XOR) function, so that is the easiest way to create a half-adder. The following illustration shows an XOR gate being used as a 1-bit half adder, but the Carry Out bit has not been added to the circuit yet.
A half adder will generate a Carry Out bit if both inputs are high (or 1+1=10_{2}), so the half adder circuit should be modified to provide that carry bit. Notice in the following circuit, if A and B are both high, then the Sum bit will be low, but the Carry Out bit will be high.
The half adder circuit is now complete and provides all of the outputs required by the truth table.
Full Adder
A full adder circuit sums two one-bit numbers along with a carry-in bit and produces a sum with a carry-out bit. The truth table for a full adder follows:
Inputs | Outputs | |||
---|---|---|---|---|
A | B | Carry In | Sum | Carry Out |
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
The outputs from this truth table lead to these two Boolean equations:
A full adder is realized like this:
The XOR gate combining inputs A and B is a simple half adder. The other XOR gate adds the Carry In bit with the Sum. The two AND gates at the bottom of the screen control the Carry Out bit. The first of those gates will be active if there is a high from A XOR B and a carry in bit is present, the second if both A and B are high. This circuit meets the requirements of the truth table and form a full adder.
Cascading Adders
Full adders can be cascaded to create an adder of any desired size. For example, the following circuit is a 4-Bit Adder:
The four "Add" circuits are each a one-bit adder as developed above. To cascade them, the Carry Out bit from one stage is connected to the Carry In bit of the next. The bits from two four-bit numbers, "InA" and "InB," are connected to the inputs of each stage and the outputs of those stages are connected to an output pin. The circuit illustrates adding 0010 + 0011 = 0101.
Adder Integrated Circuits
The adder developed above adds two 1-bit inputs (plus an optional Carry In) and produces a Sum along with a Carry Out. While this circuit is easy enough to create with discreet gates, integrated circuits implementing adders are easy to find and use. Those circuits will also add numbers larger then a single bit. The following illustration shows a 7483 4-Bit Adder:
Two different 4-bit inputs are provided to the adder (Input A and Input B), along with a Carry In (Cin) bit. The adder outputs a 4-bit Sum along with a Carry Out (Cout) bit. The wiring for this IC seems convoluted, but the pins for the IC are not in the order that may be expected. Moving counterclockwise from the top left of the IC, the pins are: A4, Sum3, A3, B3, Vcc, Sum2, B2, A2, Sum1, A1, B1, Gnd, Cin, Cout, Sum4, B4. The illustration shows that 0100 (on Input A) plus 0110 (on Input B) is 1010 (on Sum). The Carry In and Carry Out bits are not used. The Vcc (power) and Ground pins are required for a physical IC; though the simulator would have permitted these two pins to remain disconnected. Two or more 7483 ICs could be cascaded to handle sums greater than 4-bits, as illustrated below:
In the illustrated circuit, the low order bits (0-3) from Input A and Input B are sent to the first 7483 and the high order bits (4-7) are sent to the second 7483. The Carry Out bit from the first is connected to the Carry In bit of the second. The sum produced by the first 7483 is used as the low order bits in the 8-bit Sum, while the second 7483 is used for the high order bits in the Sum.
Subtractors
The concept of subtraction in a digital circuit is simple:
Thus, to subtract one binary number from another, change the subtrahend (the second number) into its twos complement and then add that to the first number. Finding the twos complement of a binary number is easy; invert all bits and then add one, which is more thoroughly covered in the Binary Subtraction unit. The Boolean equation for creating a subtractor would be:
The following illustrates a one-bit subtractor:
The above circuit is the same as a one-bit adder, but with an additional XOR gate on the B input. To subtract with an adder, first add one to the input by making the CIn (or Carry In) high. That bit is also going to be used as a control to change the circuit from adder to subtractor by using an interesting trick. Rather than simply inverting input B with a NOT gate, an XOR is used. The CIn bit is fed to one of the XOR's inputs and B is fed to the other. When CIn is low, then the top XOR input is low and the XOR output would be the same as input B; in this case, the XOR gate functions like a simple buffer. When CIn is high, then the XOR gate outputs the inverse of B; in this case, the XOR gate is functioning like a NOT gate.
Therefore, with CIn low then the circuit is an adder, but with CIn high then the circuit is a subtractor. In the following illustration, four one-bit adders are cascaded to create a four-bit adder/subtractor.
In this circuit, Ctl (which is actually CIn for the first adder) is linked to one of the XOR inputs on each bit of input B. That CIn input is functioning as a controller, changing this circuit from an adder to a subtractor. Note that the problem 1000 - 0011 = 0101 (or 8 - 3 = 5) is displayed in the circuit.
Cascading several Adder ICs to create a subtractor of any bit width is fairly easy using the same techniques illustrated above, but with an additional XOR gate for every input bit; so this is not further developed here.